There appears to be an ever-increasing demand for higher levels of integration in semiconductor circuits. In order to increase the density of devices within the semiconductor structures, some of the devices have been emplaced within the depths of the substrate, in addition to being formed on its planar upper surface.
Dynamic random access memories, or "DRAM's", typically employ openings or "trenches" for memory cell capacitance. The trenches are also used to isolate individual devices within a monolithic circuit. In order to further increase the densities of these circuits, technologists have begun to form semiconductor structures within the trenches themselves, i.e., on top of or within an interior ("concave") surface of the trench. (This area of technology is thus sometimes referred to as three-dimensional or "3D" semiconductor processing.) The formation of semiconductor structures on these interior surfaces has been very difficult, since standard photolithographic techniques are not always well-suited in this situation.
A method for enhancing photolithographic capabilities for producing images on the sidewalls of trenches is described in U.S. Pat. No. 4,838,991, issued to Cote et al. A technique described in that patent involves the formation of sidewall spacers, which are very useful structural features. As an example, spacers may serve as masks for a variety of devices which can be formed in the sidewalls, e.g., field effect transistors (FETs). Spacers can also serve to control the lateral migration of an implanted dopant under the gate of an FET. The formation of spacers within a silicon body is also taught by Pogge in U.S. Pat. No. 4,256,514. Furthermore, U.S. Pat. No. 5,096,849, issued to Beilstein, Jr. et al., describes a method for selectively masking portions of the sidewall of a trench or other concave structure by forming spacers or "bands" on the sidewalls.
It's thus apparent that spacers can play an important part in the formation of devices within the surfaces of a trench or opening in a semiconductor substrate. However, there are some serious limitations to current spacer technology. For example, the final spacer film has had to be conformal, i.e., conforming to the underlying surface. The conformal materials currently used for spacers are usually oxides or nitrides which are applied by various chemical vapor deposition (CVD) techniques. Most of the conformal materials are inorganic, although an organic material, poly-p-xylylene or "parylene", is also a conformal material. The inorganic conformal materials can be difficult to etch, thus increasing processing time and complexity.
The use of non-conformal materials as spacers does not appear to be known in the art. Unfortunately, this excludes a wide variety of organic materials from consideration as spacers, e.g., organic polymers like polyimides and photoresist resins. Organic, non-conformal materials would appear to have several notable advantages over the inorganic, conformal materials currently used for spacers. For example, the organic materials could be very easily applied and patterned, using standard photolithographic techniques, such as shadow projection masks. Furthermore, organic, non-conformal spacers could be selectively removed from the inner surfaces of a trench much more easily than inorganic materials.
Reference to the Beilstein patent mentioned above is helpful in pointing to some of the difficulties involved in the formation of inorganic, conformal spacers. Beilstein describes a method for selectively masking sidewall regions of a trench formed in a semiconductor body. A conformal layer of masking material is first formed on the trench surfaces, followed by the deposition of a selectively removable material (e.g., a photoresist material) to fill the trench. Reactive ion etching of the trench-filling material to a predetermined depth d1 determines where the bottom edge of the sidewall spacer will be placed. A conformal layer of an organic material such as parylene is then deposited to cover all of the vertical and horizontal surfaces. Another reactive ion etch then removes the horizontal portions of the conformal coating, leaving sidewall portions of the coating which adhere to the sidewalls of the trench. Then, an additional layer of a photoresist-type material is deposited on the exposed surfaces of the substrate and trench. This additional layer of material and the conformal coatings previously applied are etched by RIE to a second depth d2, which will determine the top edge of the spacer. Both of the photoresist-type materials which remain can then be removed, leaving the conformal coating regions on the sidewalls, over the initial film which had been applied. A selective etch procedure can then be used to remove uncovered areas of the first coating, but not the conformal, masking layer. After removal of the masking layer, the underlying regions of the first coating are left as sidewall spacers, as depicted in the figures of the patent.
While the Beilstein technique is effective for the creation of sidewall spacers under some circumstances, it is a rather complicated process involving many steps. Furthermore, the process sometimes cannot create a spacer of very precise dimensions. For example, the depth "d1" mentioned above determines the lower boundary of the spacer. However, the reactive ion etching step used to etch the photoresist-type material to this depth may result in a depth variance of as much as + or -20%. This variation from trench-to-trench can hinder the reproduction of exact images on the sidewalls of trenches.
New methods for forming and using sidewall spacers would thus represent a welcome advance in the art of preparing high density semiconductor structures. Moreover, new materials for use as spacers would also be very desirable in the art, so that processing is not excessively dependent on the use of conformal, inorganic materials which sometimes exhibit the disadvantages discussed above. Finally, applications for employing the spacers of the present invention would also be of great interest in the formation of various semiconductor structures.